RF:RF-LLRFProc

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Introduction

LLRFProc is a digitizer responsible for the Digital Signal Processing of the IF signals using fast AD (Analog-to-Digital) and DA (Analog-to-Digital) converters, and GPIO (General Purpose Input-Output) for several applications, including equipment protection system and motor controls, controlled by an FPGA (Field-Programmable Gate Array) as the main processor.

General description

LLRFProc incorporates the PicoDigitizer 125-Series provided by Nutaq with an RF patch panel to make easier the SMA cables connection. The simplified diagram with the main components and ports is shown in Fig. 1.

Figure 1: LLRF Processor block diagram.

Hardware overview

Picodigitizer is composed of a carrier board with a Virtex-6 FPGA, two double-stacked FMC (FPGA Mezzanine Card) boards with 16 Fast ADC channels (MI125: 14 bits, AC coupled, 125MS/s), 8 Fast DAC channels (MO1000: 16 bits, DC coupled, 1GS/s), and 32 channels GPIO daughter card (Mestor Breakout Box) provided by high-density connectors. The remote interface is made through Gigabit Ethernet that connects to a Linux server where it runs the EPICS IOC (Input/Output Controller). A mini-USB is available for local access to the backplane features. It is powered by a 150W +12V DC power supply.

Firmware overview

The main functionalities implemented in the FPGA includes RF signals status monitoring; cavity field control with rectangular and polar loops to control amplitude and phase of a selected RF signal; cavity tuning loop; automatic start-up of the system; automatic conditioning of cavities; fast data logger to record main digital processing signals for post-mortem analysis; fast interlocks handling to cut RF drives when an interlock is detected; ramping mode for Booster cavity synchronized with an external trigger; and field flatness loop for a multicell cavity. The synthesizable project can be found at project repository (available through the CNPEM network).

Versions Control

Table 1: RF-LLRFProc version control.
Version Date Description
V1I1 First assembly

The schematic, bill of materials, and all other files related to this crate can be found at:
\\centaurus\LNLS\Grupos\RF\Sirius DOC_TEC_RF\Sirius_DOC_TEC_RF\LLRF_Rack\Crates\Processor

Devices in use

Table 2: RF-LLRFProc devices.
Device # Version Device Name Location
001 V1I1 RA-RaBO01:RF-LLRFProc Booster LLRF Rack
002 V1I1 RA-RaSIA01:RF-LLRFProc Storage Ring A LLRF Rack

Crate Panels

Figure 2: LLRF Processor front panel art.
Figure 3: LLRF Processor rear panel art.

Device PVs

There are no PVs associated with this device.